Testsuite: Provide alternative output for icc

The tests in question test whether it is possible to find a vertex lying
exactly on an edge or line, respectively. Unfortunately this is not stable
under more aggressive optimization.

git-svn-id: https://svn.dealii.org/trunk@31913 0785d39b-7218-0410-832d-ea1e28bc413d

diff --git a/tests/bits/find_cell_4.output b/tests/bits/find_cell_4.compiler=Intel=false.release.output
similarity index 100%
rename from tests/bits/find_cell_4.output
rename to tests/bits/find_cell_4.compiler=Intel=false.release.output

diff --git a/tests/bits/find_cell_4.compiler=Intel=true.release.output b/tests/bits/find_cell_4.compiler=Intel=true.release.output
new file mode 100644 (file)
index 0000000..c6432b5
--- /dev/null
+++ b/tests/bits/find_cell_4.compiler=Intel=true.release.output
@@ -0,0 +1,3 @@
+
+DEAL::3.65
+DEAL::<0.625000 0.00000 0.00000> <0.750000 0.00000 0.00000> <0.625000 0.125000 0.00000> <0.750000 0.125000 0.00000> <0.625000 0.00000 0.125000> <0.750000 0.00000 0.125000> <0.625000 0.125000 0.125000> <0.750000 0.125000 0.125000> 

diff --git a/tests/bits/find_cell_4.debug.output b/tests/bits/find_cell_4.debug.output
new file mode 100644 (file)
index 0000000..7bdc5e9
--- /dev/null
+++ b/tests/bits/find_cell_4.debug.output
@@ -0,0 +1,3 @@
+
+DEAL::3.72
+DEAL::<0.750000 0.00000 0.00000> <0.875000 0.00000 0.00000> <0.750000 0.125000 0.00000> <0.875000 0.125000 0.00000> <0.750000 0.00000 0.125000> <0.875000 0.00000 0.125000> <0.750000 0.125000 0.125000> <0.875000 0.125000 0.125000> 

diff --git a/tests/bits/find_cell_5.output b/tests/bits/find_cell_5.compiler=Intel=false.release.output
similarity index 100%
rename from tests/bits/find_cell_5.output
rename to tests/bits/find_cell_5.compiler=Intel=false.release.output

diff --git a/tests/bits/find_cell_5.compiler=Intel=true.release.output b/tests/bits/find_cell_5.compiler=Intel=true.release.output
new file mode 100644 (file)
index 0000000..271406d
--- /dev/null
+++ b/tests/bits/find_cell_5.compiler=Intel=true.release.output
@@ -0,0 +1,3 @@
+
+DEAL::3.469
+DEAL::<0.625000 0.750000 0.625000> <0.750000 0.750000 0.625000> <0.625000 0.875000 0.625000> <0.750000 0.875000 0.625000> <0.625000 0.750000 0.750000> <0.750000 0.750000 0.750000> <0.625000 0.875000 0.750000> <0.750000 0.875000 0.750000> 

diff --git a/tests/bits/find_cell_5.debug.output b/tests/bits/find_cell_5.debug.output
new file mode 100644 (file)
index 0000000..838c265
--- /dev/null
+++ b/tests/bits/find_cell_5.debug.output
@@ -0,0 +1,3 @@
+
+DEAL::3.462
+DEAL::<0.750000 0.625000 0.625000> <0.875000 0.625000 0.625000> <0.750000 0.750000 0.625000> <0.875000 0.750000 0.625000> <0.750000 0.625000 0.750000> <0.875000 0.625000 0.750000> <0.750000 0.750000 0.750000> <0.875000 0.750000 0.750000> 

diff --git a/tests/bits/find_cell_alt_4.output b/tests/bits/find_cell_alt_4.compiler=Intel=false.release.output
similarity index 100%
rename from tests/bits/find_cell_alt_4.output
rename to tests/bits/find_cell_alt_4.compiler=Intel=false.release.output

diff --git a/tests/bits/find_cell_alt_4.compiler=Intel=true.release.output b/tests/bits/find_cell_alt_4.compiler=Intel=true.release.output
new file mode 100644 (file)
index 0000000..b38c692
--- /dev/null
+++ b/tests/bits/find_cell_alt_4.compiler=Intel=true.release.output
@@ -0,0 +1,4 @@
+
+DEAL::3.65
+DEAL::<0.625000 0.00000 0.00000> <0.750000 0.00000 0.00000> <0.625000 0.125000 0.00000> <0.750000 0.125000 0.00000> <0.625000 0.00000 0.125000> <0.750000 0.00000 0.125000> <0.625000 0.125000 0.125000> <0.750000 0.125000 0.125000> [ 1.00000 0.00000 0.00000] 
+DEAL::0

diff --git a/tests/bits/find_cell_alt_4.debug.output b/tests/bits/find_cell_alt_4.debug.output
new file mode 100644 (file)
index 0000000..26c15bd
--- /dev/null
+++ b/tests/bits/find_cell_alt_4.debug.output
@@ -0,0 +1,4 @@
+
+DEAL::3.72
+DEAL::<0.750000 0.00000 0.00000> <0.875000 0.00000 0.00000> <0.750000 0.125000 0.00000> <0.875000 0.125000 0.00000> <0.750000 0.00000 0.125000> <0.875000 0.00000 0.125000> <0.750000 0.125000 0.125000> <0.875000 0.125000 0.125000> [ 2.46519e-32 5.55112e-17 5.55112e-17] 
+DEAL::0

diff --git a/tests/bits/find_cell_alt_5.output b/tests/bits/find_cell_alt_5.compiler=Intel=false.release.output
similarity index 100%
rename from tests/bits/find_cell_alt_5.output
rename to tests/bits/find_cell_alt_5.compiler=Intel=false.release.output

diff --git a/tests/bits/find_cell_alt_5.compiler=Intel=true.release.output b/tests/bits/find_cell_alt_5.compiler=Intel=true.release.output
new file mode 100644 (file)
index 0000000..427e03a
--- /dev/null
+++ b/tests/bits/find_cell_alt_5.compiler=Intel=true.release.output
@@ -0,0 +1,3 @@
+
+DEAL::3.469
+DEAL::<0.625000 0.750000 0.625000> <0.750000 0.750000 0.625000> <0.625000 0.875000 0.625000> <0.750000 0.875000 0.625000> <0.625000 0.750000 0.750000> <0.750000 0.750000 0.750000> <0.625000 0.875000 0.750000> <0.750000 0.875000 0.750000> [ 1.00000 0.00000 1.00000] 

diff --git a/tests/bits/find_cell_alt_5.debug.output b/tests/bits/find_cell_alt_5.debug.output
new file mode 100644 (file)
index 0000000..6c76478
--- /dev/null
+++ b/tests/bits/find_cell_alt_5.debug.output
@@ -0,0 +1,3 @@
+
+DEAL::3.462
+DEAL::<0.750000 0.625000 0.625000> <0.875000 0.625000 0.625000> <0.750000 0.750000 0.625000> <0.875000 0.750000 0.625000> <0.750000 0.625000 0.750000> <0.875000 0.625000 0.750000> <0.750000 0.750000 0.750000> <0.875000 0.750000 0.750000> [ 0.00000 1.00000 1.00000]