Avoid signed overflow in test

diff --git a/tests/tensors/tensor_accessors_04.cc b/tests/tensors/tensor_accessors_04.cc
index b291211e7c10d464992816762b56bae30e3ce79a..6a659482108a06e6390216a83193d356bb4bf1f7 100644 (file)
--- a/tests/tensors/tensor_accessors_04.cc
+++ b/tests/tensors/tensor_accessors_04.cc
@@ -130,7 +130,7 @@ int main()
     deallog << "left:   " << left2 << std::endl;
     deallog << "middle: " << middle4 << std::endl;
     deallog << "right:  " << middle << std::endl;
-    deallog << "Result: " << TensorAccessors::contract3<2, 2, 5, int>(left2, middle4, middle)  << std::endl;
+    deallog << "Result: " << TensorAccessors::contract3<2, 2, 5, long int>(left2, middle4, middle)  << std::endl;
     deallog << std::endl;
 //     manually verified to be equal to the old implementation
 //     deallog << contract3(left2, middle4, middle) << std::endl;

diff --git a/tests/tensors/tensor_accessors_04.output b/tests/tensors/tensor_accessors_04.output
index 68f0662a271ab5706a681f7aeff6379b7cf66830..81a44163cdaa0a500a4a2f14630f66890d91c5b2 100644 (file)
--- a/tests/tensors/tensor_accessors_04.output
+++ b/tests/tensors/tensor_accessors_04.output
@@ -32,5 +32,5 @@ DEAL::
 DEAL::left:   0 17 34 51 68 0 34 68 102 136 0 68 136 204 272 0 136 272 408 544 0 272 544 816 1088
 DEAL::middle: 0 1 2 3 4 0 2 4 6 8 0 4 8 12 16 0 8 16 24 32 0 16 32 48 64 0 2 4 6 8 0 4 8 12 16 0 8 16 24 32 0 16 32 48 64 0 32 64 96 128 0 4 8 12 16 0 8 16 24 32 0 16 32 48 64 0 32 64 96 128 0 64 128 192 256 0 8 16 24 32 0 16 32 48 64 0 32 64 96 128 0 64 128 192 256 0 128 256 384 512 0 16 32 48 64 0 32 64 96 128 0 64 128 192 256 0 128 256 384 512 0 256 512 768 1024 0 2 4 6 8 0 4 8 12 16 0 8 16 24 32 0 16 32 48 64 0 32 64 96 128 0 4 8 12 16 0 8 16 24 32 0 16 32 48 64 0 32 64 96 128 0 64 128 192 256 0 8 16 24 32 0 16 32 48 64 0 32 64 96 128 0 64 128 192 256 0 128 256 384 512 0 16 32 48 64 0 32 64 96 128 0 64 128 192 256 0 128 256 384 512 0 256 512 768 1024 0 32 64 96 128 0 64 128 192 256 0 128 256 384 512 0 256 512 768 1024 0 512 1024 1536 2048 0 4 8 12 16 0 8 16 24 32 0 16 32 48 64 0 32 64 96 128 0 64 128 192 256 0 8 16 24 32 0 16 32 48 64 0 32 64 96 128 0 64 128 192 256 0 128 256 384 512 0 16 32 48 64 0 32 64 96 128 0 64 128 192 256 0 128 256 384 512 0 256 512 768 1024 0 32 64 96 128 0 64 128 192 256 0 128 256 384 512 0 256 512 768 1024 0 512 1024 1536 2048 0 64 128 192 256 0 128 256 384 512 0 256 512 768 1024 0 512 1024 1536 2048 0 1024 2048 3072 4096 0 8 16 24 32 0 16 32 48 64 0 32 64 96 128 0 64 128 192 256 0 128 256 384 512 0 16 32 48 64 0 32 64 96 128 0 64 128 192 256 0 128 256 384 512 0 256 512 768 1024 0 32 64 96 128 0 64 128 192 256 0 128 256 384 512 0 256 512 768 1024 0 512 1024 1536 2048 0 64 128 192 256 0 128 256 384 512 0 256 512 768 1024 0 512 1024 1536 2048 0 1024 2048 3072 4096 0 128 256 384 512 0 256 512 768 1024 0 512 1024 1536 2048 0 1024 2048 3072 4096 0 2048 4096 6144 8192 0 16 32 48 64 0 32 64 96 128 0 64 128 192 256 0 128 256 384 512 0 256 512 768 1024 0 32 64 96 128 0 64 128 192 256 0 128 256 384 512 0 256 512 768 1024 0 512 1024 1536 2048 0 64 128 192 256 0 128 256 384 512 0 256 512 768 1024 0 512 1024 1536 2048 0 1024 2048 3072 4096 0 128 256 384 512 0 256 512 768 1024 0 512 1024 1536 2048 0 1024 2048 3072 4096 0 2048 4096 6144 8192 0 256 512 768 1024 0 512 1024 1536 2048 0 1024 2048 3072 4096 0 2048 4096 6144 8192 0 4096 8192 12288 16384
 DEAL::right:  0 1 2 3 4 0 2 4 6 8 0 4 8 12 16 0 8 16 24 32 0 16 32 48 64
-DEAL::Result: 1516757084
+DEAL::Result: 5811724380
 DEAL::