From: Daniel Arndt Date: Mon, 30 Apr 2018 20:36:42 +0000 (+0200) Subject: Avoid signed overflow in test X-Git-Tag: v9.0.0-rc1~56^2 X-Git-Url: https://gitweb.dealii.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=ce556046de27cf31e6301ae86f8c2701350af9ed;p=dealii.git Avoid signed overflow in test --- diff --git a/tests/tensors/tensor_accessors_04.cc b/tests/tensors/tensor_accessors_04.cc index b291211e7c..6a65948210 100644 --- a/tests/tensors/tensor_accessors_04.cc +++ b/tests/tensors/tensor_accessors_04.cc @@ -130,7 +130,7 @@ int main() deallog << "left: " << left2 << std::endl; deallog << "middle: " << middle4 << std::endl; deallog << "right: " << middle << std::endl; - deallog << "Result: " << TensorAccessors::contract3<2, 2, 5, int>(left2, middle4, middle) << std::endl; + deallog << "Result: " << TensorAccessors::contract3<2, 2, 5, long int>(left2, middle4, middle) << std::endl; deallog << std::endl; // manually verified to be equal to the old implementation // deallog << contract3(left2, middle4, middle) << std::endl; diff --git a/tests/tensors/tensor_accessors_04.output b/tests/tensors/tensor_accessors_04.output index 68f0662a27..81a44163cd 100644 --- a/tests/tensors/tensor_accessors_04.output +++ b/tests/tensors/tensor_accessors_04.output @@ -32,5 +32,5 @@ DEAL:: DEAL::left: 0 17 34 51 68 0 34 68 102 136 0 68 136 204 272 0 136 272 408 544 0 272 544 816 1088 DEAL::middle: 0 1 2 3 4 0 2 4 6 8 0 4 8 12 16 0 8 16 24 32 0 16 32 48 64 0 2 4 6 8 0 4 8 12 16 0 8 16 24 32 0 16 32 48 64 0 32 64 96 128 0 4 8 12 16 0 8 16 24 32 0 16 32 48 64 0 32 64 96 128 0 64 128 192 256 0 8 16 24 32 0 16 32 48 64 0 32 64 96 128 0 64 128 192 256 0 128 256 384 512 0 16 32 48 64 0 32 64 96 128 0 64 128 192 256 0 128 256 384 512 0 256 512 768 1024 0 2 4 6 8 0 4 8 12 16 0 8 16 24 32 0 16 32 48 64 0 32 64 96 128 0 4 8 12 16 0 8 16 24 32 0 16 32 48 64 0 32 64 96 128 0 64 128 192 256 0 8 16 24 32 0 16 32 48 64 0 32 64 96 128 0 64 128 192 256 0 128 256 384 512 0 16 32 48 64 0 32 64 96 128 0 64 128 192 256 0 128 256 384 512 0 256 512 768 1024 0 32 64 96 128 0 64 128 192 256 0 128 256 384 512 0 256 512 768 1024 0 512 1024 1536 2048 0 4 8 12 16 0 8 16 24 32 0 16 32 48 64 0 32 64 96 128 0 64 128 192 256 0 8 16 24 32 0 16 32 48 64 0 32 64 96 128 0 64 128 192 256 0 128 256 384 512 0 16 32 48 64 0 32 64 96 128 0 64 128 192 256 0 128 256 384 512 0 256 512 768 1024 0 32 64 96 128 0 64 128 192 256 0 128 256 384 512 0 256 512 768 1024 0 512 1024 1536 2048 0 64 128 192 256 0 128 256 384 512 0 256 512 768 1024 0 512 1024 1536 2048 0 1024 2048 3072 4096 0 8 16 24 32 0 16 32 48 64 0 32 64 96 128 0 64 128 192 256 0 128 256 384 512 0 16 32 48 64 0 32 64 96 128 0 64 128 192 256 0 128 256 384 512 0 256 512 768 1024 0 32 64 96 128 0 64 128 192 256 0 128 256 384 512 0 256 512 768 1024 0 512 1024 1536 2048 0 64 128 192 256 0 128 256 384 512 0 256 512 768 1024 0 512 1024 1536 2048 0 1024 2048 3072 4096 0 128 256 384 512 0 256 512 768 1024 0 512 1024 1536 2048 0 1024 2048 3072 4096 0 2048 4096 6144 8192 0 16 32 48 64 0 32 64 96 128 0 64 128 192 256 0 128 256 384 512 0 256 512 768 1024 0 32 64 96 128 0 64 128 192 256 0 128 256 384 512 0 256 512 768 1024 0 512 1024 1536 2048 0 64 128 192 256 0 128 256 384 512 0 256 512 768 1024 0 512 1024 1536 2048 0 1024 2048 3072 4096 0 128 256 384 512 0 256 512 768 1024 0 512 1024 1536 2048 0 1024 2048 3072 4096 0 2048 4096 6144 8192 0 256 512 768 1024 0 512 1024 1536 2048 0 1024 2048 3072 4096 0 2048 4096 6144 8192 0 4096 8192 12288 16384 DEAL::right: 0 1 2 3 4 0 2 4 6 8 0 4 8 12 16 0 8 16 24 32 0 16 32 48 64 -DEAL::Result: 1516757084 +DEAL::Result: 5811724380 DEAL::