From edc483b43642aae697eee128c89c5844770c2a19 Mon Sep 17 00:00:00 2001 From: maier Date: Fri, 6 Dec 2013 16:52:31 +0000 Subject: [PATCH] Testsuite: Provide alternative output for icc The tests in question test whether it is possible to find a vertex lying exactly on an edge or line, respectively. Unfortunately this is not stable under more aggressive optimization. git-svn-id: https://svn.dealii.org/trunk@31913 0785d39b-7218-0410-832d-ea1e28bc413d --- ...output => find_cell_4.compiler=Intel=false.release.output} | 0 tests/bits/find_cell_4.compiler=Intel=true.release.output | 3 +++ tests/bits/find_cell_4.debug.output | 3 +++ ...output => find_cell_5.compiler=Intel=false.release.output} | 0 tests/bits/find_cell_5.compiler=Intel=true.release.output | 3 +++ tests/bits/find_cell_5.debug.output | 3 +++ ...ut => find_cell_alt_4.compiler=Intel=false.release.output} | 0 tests/bits/find_cell_alt_4.compiler=Intel=true.release.output | 4 ++++ tests/bits/find_cell_alt_4.debug.output | 4 ++++ ...ut => find_cell_alt_5.compiler=Intel=false.release.output} | 0 tests/bits/find_cell_alt_5.compiler=Intel=true.release.output | 3 +++ tests/bits/find_cell_alt_5.debug.output | 3 +++ 12 files changed, 26 insertions(+) rename tests/bits/{find_cell_4.output => find_cell_4.compiler=Intel=false.release.output} (100%) create mode 100644 tests/bits/find_cell_4.compiler=Intel=true.release.output create mode 100644 tests/bits/find_cell_4.debug.output rename tests/bits/{find_cell_5.output => find_cell_5.compiler=Intel=false.release.output} (100%) create mode 100644 tests/bits/find_cell_5.compiler=Intel=true.release.output create mode 100644 tests/bits/find_cell_5.debug.output rename tests/bits/{find_cell_alt_4.output => find_cell_alt_4.compiler=Intel=false.release.output} (100%) create mode 100644 tests/bits/find_cell_alt_4.compiler=Intel=true.release.output create mode 100644 tests/bits/find_cell_alt_4.debug.output rename tests/bits/{find_cell_alt_5.output => find_cell_alt_5.compiler=Intel=false.release.output} (100%) create mode 100644 tests/bits/find_cell_alt_5.compiler=Intel=true.release.output create mode 100644 tests/bits/find_cell_alt_5.debug.output diff --git a/tests/bits/find_cell_4.output b/tests/bits/find_cell_4.compiler=Intel=false.release.output similarity index 100% rename from tests/bits/find_cell_4.output rename to tests/bits/find_cell_4.compiler=Intel=false.release.output diff --git a/tests/bits/find_cell_4.compiler=Intel=true.release.output b/tests/bits/find_cell_4.compiler=Intel=true.release.output new file mode 100644 index 0000000000..c6432b503a --- /dev/null +++ b/tests/bits/find_cell_4.compiler=Intel=true.release.output @@ -0,0 +1,3 @@ + +DEAL::3.65 +DEAL::<0.625000 0.00000 0.00000> <0.750000 0.00000 0.00000> <0.625000 0.125000 0.00000> <0.750000 0.125000 0.00000> <0.625000 0.00000 0.125000> <0.750000 0.00000 0.125000> <0.625000 0.125000 0.125000> <0.750000 0.125000 0.125000> diff --git a/tests/bits/find_cell_4.debug.output b/tests/bits/find_cell_4.debug.output new file mode 100644 index 0000000000..7bdc5e949d --- /dev/null +++ b/tests/bits/find_cell_4.debug.output @@ -0,0 +1,3 @@ + +DEAL::3.72 +DEAL::<0.750000 0.00000 0.00000> <0.875000 0.00000 0.00000> <0.750000 0.125000 0.00000> <0.875000 0.125000 0.00000> <0.750000 0.00000 0.125000> <0.875000 0.00000 0.125000> <0.750000 0.125000 0.125000> <0.875000 0.125000 0.125000> diff --git a/tests/bits/find_cell_5.output b/tests/bits/find_cell_5.compiler=Intel=false.release.output similarity index 100% rename from tests/bits/find_cell_5.output rename to tests/bits/find_cell_5.compiler=Intel=false.release.output diff --git a/tests/bits/find_cell_5.compiler=Intel=true.release.output b/tests/bits/find_cell_5.compiler=Intel=true.release.output new file mode 100644 index 0000000000..271406d7e1 --- /dev/null +++ b/tests/bits/find_cell_5.compiler=Intel=true.release.output @@ -0,0 +1,3 @@ + +DEAL::3.469 +DEAL::<0.625000 0.750000 0.625000> <0.750000 0.750000 0.625000> <0.625000 0.875000 0.625000> <0.750000 0.875000 0.625000> <0.625000 0.750000 0.750000> <0.750000 0.750000 0.750000> <0.625000 0.875000 0.750000> <0.750000 0.875000 0.750000> diff --git a/tests/bits/find_cell_5.debug.output b/tests/bits/find_cell_5.debug.output new file mode 100644 index 0000000000..838c265721 --- /dev/null +++ b/tests/bits/find_cell_5.debug.output @@ -0,0 +1,3 @@ + +DEAL::3.462 +DEAL::<0.750000 0.625000 0.625000> <0.875000 0.625000 0.625000> <0.750000 0.750000 0.625000> <0.875000 0.750000 0.625000> <0.750000 0.625000 0.750000> <0.875000 0.625000 0.750000> <0.750000 0.750000 0.750000> <0.875000 0.750000 0.750000> diff --git a/tests/bits/find_cell_alt_4.output b/tests/bits/find_cell_alt_4.compiler=Intel=false.release.output similarity index 100% rename from tests/bits/find_cell_alt_4.output rename to tests/bits/find_cell_alt_4.compiler=Intel=false.release.output diff --git a/tests/bits/find_cell_alt_4.compiler=Intel=true.release.output b/tests/bits/find_cell_alt_4.compiler=Intel=true.release.output new file mode 100644 index 0000000000..b38c6928b5 --- /dev/null +++ b/tests/bits/find_cell_alt_4.compiler=Intel=true.release.output @@ -0,0 +1,4 @@ + +DEAL::3.65 +DEAL::<0.625000 0.00000 0.00000> <0.750000 0.00000 0.00000> <0.625000 0.125000 0.00000> <0.750000 0.125000 0.00000> <0.625000 0.00000 0.125000> <0.750000 0.00000 0.125000> <0.625000 0.125000 0.125000> <0.750000 0.125000 0.125000> [ 1.00000 0.00000 0.00000] +DEAL::0 diff --git a/tests/bits/find_cell_alt_4.debug.output b/tests/bits/find_cell_alt_4.debug.output new file mode 100644 index 0000000000..26c15bddb9 --- /dev/null +++ b/tests/bits/find_cell_alt_4.debug.output @@ -0,0 +1,4 @@ + +DEAL::3.72 +DEAL::<0.750000 0.00000 0.00000> <0.875000 0.00000 0.00000> <0.750000 0.125000 0.00000> <0.875000 0.125000 0.00000> <0.750000 0.00000 0.125000> <0.875000 0.00000 0.125000> <0.750000 0.125000 0.125000> <0.875000 0.125000 0.125000> [ 2.46519e-32 5.55112e-17 5.55112e-17] +DEAL::0 diff --git a/tests/bits/find_cell_alt_5.output b/tests/bits/find_cell_alt_5.compiler=Intel=false.release.output similarity index 100% rename from tests/bits/find_cell_alt_5.output rename to tests/bits/find_cell_alt_5.compiler=Intel=false.release.output diff --git a/tests/bits/find_cell_alt_5.compiler=Intel=true.release.output b/tests/bits/find_cell_alt_5.compiler=Intel=true.release.output new file mode 100644 index 0000000000..427e03ada8 --- /dev/null +++ b/tests/bits/find_cell_alt_5.compiler=Intel=true.release.output @@ -0,0 +1,3 @@ + +DEAL::3.469 +DEAL::<0.625000 0.750000 0.625000> <0.750000 0.750000 0.625000> <0.625000 0.875000 0.625000> <0.750000 0.875000 0.625000> <0.625000 0.750000 0.750000> <0.750000 0.750000 0.750000> <0.625000 0.875000 0.750000> <0.750000 0.875000 0.750000> [ 1.00000 0.00000 1.00000] diff --git a/tests/bits/find_cell_alt_5.debug.output b/tests/bits/find_cell_alt_5.debug.output new file mode 100644 index 0000000000..6c76478868 --- /dev/null +++ b/tests/bits/find_cell_alt_5.debug.output @@ -0,0 +1,3 @@ + +DEAL::3.462 +DEAL::<0.750000 0.625000 0.625000> <0.875000 0.625000 0.625000> <0.750000 0.750000 0.625000> <0.875000 0.750000 0.625000> <0.750000 0.625000 0.750000> <0.875000 0.625000 0.750000> <0.750000 0.750000 0.750000> <0.875000 0.750000 0.750000> [ 0.00000 1.00000 1.00000] -- 2.39.5